A Design of Direct Memory Access Controller for Wireless Communication SoC in Power Grid

Abstract

This paper presents a complete Register Transfer Level (RTL) design of Direct Memory Access (DMA) controller which is compliable with the Advanced Highperformance Bus (AHB). The DMA is integrated in Cortex-M3-based system-on-chip (SoC) designed for power-grid-dedicated wireless communication system based on IEEE 802.11ah protocol. The hardware implementation and prototype verification indicate that by allowing hardware devices working at different frequencies to communicate with each other without relying on the heavy outage load of CPU, the proposed DMA controller realizes the good convergence with the whole system and improves the overall performance with low power consumption.