Time domain multiconductor transmission line analysis using effective internal impedance

Sangwoo Kim, D. Neikirk
{"title":"Time domain multiconductor transmission line analysis using effective internal impedance","authors":"Sangwoo Kim, D. Neikirk","doi":"10.1109/EPEP.1997.634083","DOIUrl":null,"url":null,"abstract":"A compact skin effect circuit model is used to formulate a time domain boundary condition for lossy transmission lines. The resulting lossless-like multiconductor equations can be used in various time domain calculations, including FDTD.","PeriodicalId":220951,"journal":{"name":"Electrical Performance of Electronic Packaging","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Electrical Performance of Electronic Packaging","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.1997.634083","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9

Abstract

A compact skin effect circuit model is used to formulate a time domain boundary condition for lossy transmission lines. The resulting lossless-like multiconductor equations can be used in various time domain calculations, including FDTD.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
时域多导体传输线有效内阻抗分析
利用紧凑的趋肤效应电路模型,给出了有耗传输线的时域边界条件。所得的类无损多导体方程可用于各种时域计算,包括时域有限差分法。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Low-cost technique for reducing the simultaneous switching noise in sub-board packaging configurations Time domain multiconductor transmission line analysis using effective internal impedance Ultra low loss millimeter wave MCM interconnects Survey of model reduction techniques for analysis of package and interconnect models of high-speed designs Delta-I noise avoidance methodology for high performance chip designs [CMOS microprocessors]
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1