{"title":"Boost power factor correction circuits","authors":"A. Khan, I. Batarseh, K. Siri, J. Elias","doi":"10.1109/SOUTHC.1994.498165","DOIUrl":null,"url":null,"abstract":"In this paper, we present two modified boost converter topologies to be used as power factor correction circuits. Zero-voltage switching and proper transformer-core resetting are achieved utilizing the parasitic capacitance of the switch and the magnetization inductance of the transformer. Steady state analysis for the two circuits is given. To verify our theoretical approval, simulation results are reported.","PeriodicalId":164672,"journal":{"name":"Conference Record Southcon","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Conference Record Southcon","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOUTHC.1994.498165","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In this paper, we present two modified boost converter topologies to be used as power factor correction circuits. Zero-voltage switching and proper transformer-core resetting are achieved utilizing the parasitic capacitance of the switch and the magnetization inductance of the transformer. Steady state analysis for the two circuits is given. To verify our theoretical approval, simulation results are reported.
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