S. A. Imam, Aijaz M. Zaidi, A. Choudhary, B. Kanaujia, M. Singh
{"title":"A quad band quadrature branch line coupler using coupled line sections","authors":"S. A. Imam, Aijaz M. Zaidi, A. Choudhary, B. Kanaujia, M. Singh","doi":"10.1109/ICAM.2017.8242151","DOIUrl":null,"url":null,"abstract":"A new quad band quadrature branch line coupler (BLC) has been presented in this paper. The proposed BLC has been designed with the help of the T shaped coupled line sections, quad band impedance inverter. The BLC has been designed using Advanced Design System (ADS) software for f1 = 0.66 GHz, f2 = 1.52 GHz, f3 = 2.57 GHz and f4 = 3.44 GHz operating frequencies. The Rogers 5870 substrate has been selected for the BLC design. The BLC's S-parameters characteristics including insertion loss, isolation loss, quadrature phase and equal power division have been achieved with 0.58 dB maximum amplitude imbalance and 4.33° maximum phase deviation while preserved the <-10dB return loss and isolation loss at four frequency bands. The simulated results of the BLC verified the theoretical results of the BLC at four frequency bands.","PeriodicalId":117801,"journal":{"name":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICAM.2017.8242151","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
A new quad band quadrature branch line coupler (BLC) has been presented in this paper. The proposed BLC has been designed with the help of the T shaped coupled line sections, quad band impedance inverter. The BLC has been designed using Advanced Design System (ADS) software for f1 = 0.66 GHz, f2 = 1.52 GHz, f3 = 2.57 GHz and f4 = 3.44 GHz operating frequencies. The Rogers 5870 substrate has been selected for the BLC design. The BLC's S-parameters characteristics including insertion loss, isolation loss, quadrature phase and equal power division have been achieved with 0.58 dB maximum amplitude imbalance and 4.33° maximum phase deviation while preserved the <-10dB return loss and isolation loss at four frequency bands. The simulated results of the BLC verified the theoretical results of the BLC at four frequency bands.
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