L. Torres, M. Robert, E. Bourennane, M. Paindavoine
{"title":"Implementation of a recursive real time edge detector using retiming techniques","authors":"L. Torres, M. Robert, E. Bourennane, M. Paindavoine","doi":"10.1109/ASPDAC.1995.486407","DOIUrl":null,"url":null,"abstract":"We present the design of a real time image processing circuit based on an optimized Canny Deriche filter for ramp edge detection. This filter is implemented in a recursive form. A retiming method is used to achieve very high speed filtering. The edge calculation function has been implemented using a CMOS 1 /spl mu/m process (area 29 mm/sup 2/). This ASIC is able to process a pixel in less than 30 ns and image sizes from 64/spl times/64 to 1024/spl times/1024 pixels.","PeriodicalId":119232,"journal":{"name":"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"39","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.1995.486407","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 39
Abstract
We present the design of a real time image processing circuit based on an optimized Canny Deriche filter for ramp edge detection. This filter is implemented in a recursive form. A retiming method is used to achieve very high speed filtering. The edge calculation function has been implemented using a CMOS 1 /spl mu/m process (area 29 mm/sup 2/). This ASIC is able to process a pixel in less than 30 ns and image sizes from 64/spl times/64 to 1024/spl times/1024 pixels.
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