Daeje Chin, Changhyun Kim, Y. Choi, D. Min, H. Hwang, Hoon Choi, S. Cho, T. Chung, C. Park, Y. Shin, Kwangpyuk Suh, Y. E. Park
{"title":"An expermental 16Mb DRAM with reduced peak-current noise","authors":"Daeje Chin, Changhyun Kim, Y. Choi, D. Min, H. Hwang, Hoon Choi, S. Cho, T. Chung, C. Park, Y. Shin, Kwangpyuk Suh, Y. E. Park","doi":"10.1109/VLSIC.1989.1037515","DOIUrl":null,"url":null,"abstract":"In high-density DRAM'S, a large peak current of typically 200-300mA occurs when sense amplifiers start latching in a conventional scheme (Figure la), resulting in intolerable power bus noise. Four-phase drive for PMOS restoring was reported to reduce the pe& current by triggering four pull-up transistors successively.[l] The initial sensing operation by NMOS latches, however, is more critical to signal margjn and sensing speed.","PeriodicalId":136228,"journal":{"name":"Symposium 1989 on VLSI Circuits","volume":"189 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Symposium 1989 on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1989.1037515","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
In high-density DRAM'S, a large peak current of typically 200-300mA occurs when sense amplifiers start latching in a conventional scheme (Figure la), resulting in intolerable power bus noise. Four-phase drive for PMOS restoring was reported to reduce the pe& current by triggering four pull-up transistors successively.[l] The initial sensing operation by NMOS latches, however, is more critical to signal margjn and sensing speed.