{"title":"A 30 V line driver in submicron BiCMOS technology","authors":"M. Aliahmad, C. Salama","doi":"10.1109/ISPSD.1996.509449","DOIUrl":null,"url":null,"abstract":"This paper presents a 30 V line driver for telecommunication applications. The circuit (0.3 mm/sup 2/ in area) is implemented in a 5 V 0.8 /spl mu/m BiCMOS process using 30 V extended-drain MOS devices fully compatible with low voltage technology. The design uses a Quasi-Current Mirror output stage and is capable of delivering up to 30 mA to the load with an idle current of less than 1 mA. The line driver exhibits a bandwidth of 2 MHz with a phase margin of 45.","PeriodicalId":377997,"journal":{"name":"8th International Symposium on Power Semiconductor Devices and ICs. ISPSD '96. Proceedings","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"8th International Symposium on Power Semiconductor Devices and ICs. ISPSD '96. Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.1996.509449","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper presents a 30 V line driver for telecommunication applications. The circuit (0.3 mm/sup 2/ in area) is implemented in a 5 V 0.8 /spl mu/m BiCMOS process using 30 V extended-drain MOS devices fully compatible with low voltage technology. The design uses a Quasi-Current Mirror output stage and is capable of delivering up to 30 mA to the load with an idle current of less than 1 mA. The line driver exhibits a bandwidth of 2 MHz with a phase margin of 45.
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