{"title":"A 24.7 dB low noise amplifier with variable gain and tunable matching in 130 nm SiGe at 200 GHz","authors":"Paul Stärke, D. Fritsche, C. Carta, F. Ellinger","doi":"10.23919/EUMIC.2017.8230646","DOIUrl":null,"url":null,"abstract":"This work presents a low noise amplifier with variable gain, large bandwidth and a tunable output matching network fabricated in a 130 nm SiGe BiCMOS technology. The circuit is designed as an input stage for mm-wave wireless applications, where gain control improves the linearity of the full system and extends its input-power range. The noise performance is optimized with an inductive interstage matching technique, while simultaneously increasing the average gain per stage. The total gain is adjustable from 0 dB to 24.7 dB, with the minimum simulated noise figure of 9.2 dB and a corresponding bandwidth of 20 GHz attained at 20 dB. The output reflection coefficient is tuned through a varactor-based matching network over a 10 GHz bandwidth. The maximum input referred 1 dB compression point is −25.5 dBm. This is achieved with a dc power consumption of up to 37.2 mW. The area of the complete integrated circuit is 0.48 mm2.","PeriodicalId":120932,"journal":{"name":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","volume":"179 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/EUMIC.2017.8230646","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 11
Abstract
This work presents a low noise amplifier with variable gain, large bandwidth and a tunable output matching network fabricated in a 130 nm SiGe BiCMOS technology. The circuit is designed as an input stage for mm-wave wireless applications, where gain control improves the linearity of the full system and extends its input-power range. The noise performance is optimized with an inductive interstage matching technique, while simultaneously increasing the average gain per stage. The total gain is adjustable from 0 dB to 24.7 dB, with the minimum simulated noise figure of 9.2 dB and a corresponding bandwidth of 20 GHz attained at 20 dB. The output reflection coefficient is tuned through a varactor-based matching network over a 10 GHz bandwidth. The maximum input referred 1 dB compression point is −25.5 dBm. This is achieved with a dc power consumption of up to 37.2 mW. The area of the complete integrated circuit is 0.48 mm2.