Mark Neisser, Harry J. Levinson, S. Wurm, D. Kyser, Takeo Watanabe, Kenneth P. MacWilliams, H. Ishiuchi, W. Trybula, Naoya Hayashi, Ted Fedynyshyn, Craig Higgins, Tsuyoshi Nakamura, Douglas J. Resnick, Moshe E. Preil, M. Lercel, Hajime Aoyama, E. Hosler
{"title":"Lithography","authors":"Mark Neisser, Harry J. Levinson, S. Wurm, D. Kyser, Takeo Watanabe, Kenneth P. MacWilliams, H. Ishiuchi, W. Trybula, Naoya Hayashi, Ted Fedynyshyn, Craig Higgins, Tsuyoshi Nakamura, Douglas J. Resnick, Moshe E. Preil, M. Lercel, Hajime Aoyama, E. Hosler","doi":"10.1109/irds54852.2021.00017","DOIUrl":null,"url":null,"abstract":"Historically, improvements in lithography have enabled improved chip technologies. The International Roadmap for Devices and Systems (IRDS) Lithography roadmap predicts where current patterning capability can support future chip generations and where challenges and improvements are needed. It is intended to be used by semiconductor industry participants, by industry analysts, and by researchers who want or need to know how the industry will evolve in the future and what challenges need to be addressed.","PeriodicalId":160542,"journal":{"name":"2021 IEEE International Roadmap for Devices and Systems Outbriefs","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE International Roadmap for Devices and Systems Outbriefs","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/irds54852.2021.00017","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Historically, improvements in lithography have enabled improved chip technologies. The International Roadmap for Devices and Systems (IRDS) Lithography roadmap predicts where current patterning capability can support future chip generations and where challenges and improvements are needed. It is intended to be used by semiconductor industry participants, by industry analysts, and by researchers who want or need to know how the industry will evolve in the future and what challenges need to be addressed.
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