Logic Design of an 8-bit RSFQ Microprocessor

Abstract

An 8-bit bit-parallel RSFQ microprocessor, named HUTU, is proposed. It can execute 28 different instructions. Each instruction consists of eight bits. Harvard-type architecture is adopted for parallel processing between the control unit and the datapath. The control unit uses an asynchronous timing method to avoid pipeline flushing and to reduce the area. Concurrent-flow clocking is adopted in the datapath for high performance. The simulation result shows that the elements of HUTU run correctly.