Blocking EMI Optimization of the Drive Circuit for an Intelligent High Side Power Switch

Wu Jianyu, Hongli Zhang, Jianfei Wu
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Abstract

Despite the advantages of a fast switching speed and a low power consumption, intelligent switch chips as a controlled power supply chip need to be electromagnetic compatible due to the complex working environment. Either injection of electromagnetic interference or the transistor's own parasitic capacitance due to the change to the transistor state can result in chip failure. This paper will introduce a novel optimization strategy of reducing (Electromagnetic interference) EMI for an intelligent high side power switch. The proposed circuit is characterized by a differential voltage comparator for a better tolerance of interference and it also exploits the single-term conductivity of the diode to block noise. Experimental results show that the improved method can suppress the electromagnetic interference effectively and improve the anti-jamming ability without increasing the chip die area. It has a wide application potential in improving the reliability of chips.
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智能高压电源开关驱动电路的电磁干扰抑制优化
智能开关芯片虽然具有开关速度快、功耗低的优点,但由于工作环境复杂,需要具备电磁兼容能力。无论是电磁干扰的注入,还是晶体管自身由于晶体管状态变化而产生的寄生电容,都可能导致芯片失效。本文将介绍一种新型的降低智能高压电源开关电磁干扰的优化策略。所提出的电路的特点是一个差分电压比较器,以更好地容忍干扰,它还利用二极管的单项电导率来阻挡噪声。实验结果表明,改进后的方法在不增加芯片芯片面积的情况下,能有效抑制电磁干扰,提高抗干扰能力。它在提高芯片可靠性方面具有广泛的应用潜力。
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