A simplified on-chip calibration method for branch-line coupler

Wei Jiang, Guoan Wang
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引用次数: 2

Abstract

In this paper, we propose a simplified on-chip calibration method for multi-port devices to de-embed the unwanted but unavoidable parasitics introduced by the probing pads as well as the effects originating from redundant feeding lines. The traditional TRL (Thru, Reflect, Line) calibration technique for single-ended two-port device is extended to a classic on-chip branch-line coupler that can be decomposed as the odd-and even-mode equivalent circuit. Accordingly, the TRL calibration standards in the balanced format are designed as well. As a final step, 4-port single-ended S-parameters of device under test (DUT) are reconstructed through its de-embedded odd-and even-mode S-parameters. To validate the efficacy of our proposed method in extracting S-parameters of DUT, models in HFSS, such as the branch-line coupler with probing pads, and modified TRL calibration standards are generated. After performing the de-embedding procedures with the proposed calibration method in this paper, the extracted S-parameters agree well with the simulated S-parameters of DUT without adding any pads and feeding lines for measurement.
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一种简化的支路耦合器片上标定方法
在本文中,我们提出了一种简化的多端口器件片上校准方法,以消除由探测垫引入的不必要但不可避免的寄生以及冗余馈线产生的影响。将单端双端口器件的传统TRL (Thru, Reflect, Line)校准技术扩展到可分解为奇偶模等效电路的经典片上分支线耦合器。据此,设计了平衡格式的TRL校准标准。最后一步,通过被测设备的去嵌入奇偶模s参数重构被测设备的4端口单端s参数。为了验证我们提出的方法在提取被测件s参数方面的有效性,我们生成了HFSS中的模型,例如带探测盘的支路耦合器和修改的TRL校准标准。采用本文提出的校准方法进行去嵌入处理后,提取的s参数与模拟的被测物体s参数吻合较好,无需添加任何垫片和馈线进行测量。
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Enabling fast process variation and fault simulation through macromodelling of analog components One more time! Increasing fault detection with scan shift capture Nanoscale silicon mosfet response to THz radiation for testing VLSI A simplified on-chip calibration method for branch-line coupler New testing approach using near electromagnetic field probing intending to upgrade in-circuit testing of high density PCBAs
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