Mixed design approaches on the semicustom gate forest

J. Kernhof, M. Schau, M. Beunder, W. Haas, B. Hoefflinger
{"title":"Mixed design approaches on the semicustom gate forest","authors":"J. Kernhof, M. Schau, M. Beunder, W. Haas, B. Hoefflinger","doi":"10.1109/CICC.1989.56760","DOIUrl":null,"url":null,"abstract":"Two CMOS semicustom gate forest chips with over 120K active transistors are presented: a digital filter circuit with a performance of 720 MOPS (million operations/s), and a 16-channel 70-Mb/s broadband switch unit. Static and domino cells, analog modules, and multiport RAMs are included. With 1600 transistors per mm2 the chips match the efficiency of 2-μm full-custom designs","PeriodicalId":165054,"journal":{"name":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1989.56760","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

Two CMOS semicustom gate forest chips with over 120K active transistors are presented: a digital filter circuit with a performance of 720 MOPS (million operations/s), and a 16-channel 70-Mb/s broadband switch unit. Static and domino cells, analog modules, and multiport RAMs are included. With 1600 transistors per mm2 the chips match the efficiency of 2-μm full-custom designs
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
半定制门林的混合设计方法
提出了两种具有超过120K有源晶体管的CMOS半定制门森林芯片:一个性能为720 MOPS(百万次运算/秒)的数字滤波电路和一个16通道70 mb /s的宽带开关单元。包括静态和多米诺骨牌细胞,模拟模块和多端口ram。该芯片每平方毫米1600个晶体管的效率与2 μm全定制设计相匹配
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A 1.4 ns/64 kb RAM with 85 ps/3680 logic gate array A gate matrix deformation and three-dimensional maze routing for dense MOS module generation A submicron CMOS triple level metal technology for ASIC applications Hot carrier effects on CMOS circuit performance The QML-an approach for qualifying ASICs
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1