High temperature testing of SOI devices to 400/spl deg/C

Abstract

Digital circuitry that would perform reliably in adverse high temperature environments is needed in applications that include under-the-hood and anti-lock braking automotive functions as well as distributed jet engine control applications. Careful circuit design practices coupled with a good understanding of how these devices perform at, elevated temperatures would allow the development of these circuit functions for reliable, long term operation in these environments. This paper describes the high temperature (to 400/spl deg/C) testing and characterization of a number of parametric test structures fabricated using United Technologies Microelectronics Center's Digital CMOS SOI (DCS) process. This technology was designed for high performance, low power, high temperature, and radiation hardened applications at conventional and reduced power supply voltage levels.<>