Design of monolithic silicon photonics at 25 Gb/s

2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2017-10-01 DOI:10.1109/CSICS.2017.8240453

J. Orcutt

引用次数: 4

Abstract

Monolithic CMOS photonics seeks to minimize total transceiver cost by simplifying packaging, design and test. Here, I examine 25 Gb/s applications in commercially available process technology with a focus on receiver sub-system optimization.

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25gb /s单片硅光子学设计

单片CMOS光子学通过简化封装、设计和测试来最小化收发器的总成本。在这里，我研究了商用过程技术中的25gb /s应用程序，重点是接收器子系统优化。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)

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