COST: Circuit Optimization SysTem in ASIC library development environment

C. S. Raghu, S. Bhowmik, Poorvaja Ramani, S. Sundaram
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Abstract

Increased focus on high performance circuit design and shorter development cycle time for ASIC libraries, are driving the need for automatic circuit optimizers in the ASIC library development environment. High performance input/output circuits are the key differentiator cells in the ASIC library market. Automating the design process of these circuits using an optimizer, not only ensures high performance cells but also provides faster design cycle. COST has been used to optimize cells in the development of many ASIC libraries. In this paper we have described the essential components of the COST optimization system and presented a method for optimizing I/O circuits. We have compared the performance of the two cost function heuristics implemented in our optimization system on ASIC input/output circuits.
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成本:电路优化系统在ASIC库开发环境
越来越多的关注高性能电路设计和缩短ASIC库的开发周期时间,正在推动ASIC库开发环境中对自动电路优化器的需求。高性能输入/输出电路是ASIC库市场的关键差异化单元。使用优化器自动化这些电路的设计过程,不仅确保了高性能单元,而且提供了更快的设计周期。在许多ASIC库的开发中,COST已被用于优化单元。在本文中,我们描述了成本优化系统的基本组成部分,并提出了优化I/O电路的方法。我们比较了在我们的优化系统中实现的两种成本函数启发式算法在ASIC输入/输出电路上的性能。
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