H. Kuriyama, T. Hirose, S. Murakami, T. Wada, K. Fujita, Y. Nishimura, K. Anami
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引用次数: 1
Abstract
An 8-ns serial access time has been realized in a 4-Mb static RAM with newly proposed circuits (hierarchical shift registers and look-ahead circuits) which can access up to 4 Mb. This memory realizes a 125-MHz fast serial READ/WRITE operation suitable for ultra-high-speed memory systems such as image-processing systems, high-speed testing systems, and supercomputers. This function is also beneficial for reducing the testing time of the RAM
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