Characterization and modeling of transistors embedded in a high performance bipolar logic array

Abstract

A set of high-frequency test structures for device characterization and the extraction of DC, CV, and AC bipolar SPICE model parameters has been implemented on a triple layer metal, high-performance bipolar logic array. These structures have proven useful in the development of accurate, statistically based SPICE models, relying on a readily available bank of logic array product base wafers. Sample results and the use of Hewlett-Packard's IC-CAP parameter extraction program to study these structures are discussed.