A low-power digital camera-on-a-chip implemented in CMOS active pixel approach

B. Pain, Guang Yang, B. Olson, T. Shaw, M. Ortiz, J. Heynssens, C. Wrigley, Charlie Ho
{"title":"A low-power digital camera-on-a-chip implemented in CMOS active pixel approach","authors":"B. Pain, Guang Yang, B. Olson, T. Shaw, M. Ortiz, J. Heynssens, C. Wrigley, Charlie Ho","doi":"10.1109/ICVD.1999.745119","DOIUrl":null,"url":null,"abstract":"The advent of high performance imaging in CMOS technology using active pixel sensors has enabled ultra-low power, miniature, integrated, single-chip camera systems. We report the first fully digital, programmable, 5-wire, large format (512/spl times/512) digital-camera-on-a-chip that integrates the imager array, control logic, ADC, and bias generation on the same chip. The VLSI chip runs off a single (3.3 V) power supply, consumes only 8 mW at video rates, is capable of electronic panning, and produces high quality images with 78 dB dynamic range.","PeriodicalId":443373,"journal":{"name":"Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICVD.1999.745119","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13

Abstract

The advent of high performance imaging in CMOS technology using active pixel sensors has enabled ultra-low power, miniature, integrated, single-chip camera systems. We report the first fully digital, programmable, 5-wire, large format (512/spl times/512) digital-camera-on-a-chip that integrates the imager array, control logic, ADC, and bias generation on the same chip. The VLSI chip runs off a single (3.3 V) power supply, consumes only 8 mW at video rates, is capable of electronic panning, and produces high quality images with 78 dB dynamic range.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
一种采用CMOS有源像素方法实现的低功耗单片数码相机
使用有源像素传感器的高性能CMOS成像技术的出现,使超低功耗、微型、集成、单芯片相机系统成为可能。我们报告了第一个全数字,可编程,5线,大画幅(512/spl倍/512)芯片上的数字相机,它集成了成像仪阵列,控制逻辑,ADC和偏置生成在同一芯片上。该VLSI芯片使用单电源(3.3 V),视频速率仅消耗8 mW,能够电子平移,并产生78 dB动态范围的高质量图像。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Improved effective capacitance computations for use in logic and layout optimization Assignment and reordering of incompletely specified pattern sequences targetting minimum power dissipation FzCRITIC-a functional timing verifier using a novel fuzzy delay model Verifying Tomasulo's algorithm by refinement Superscalar processor validation at the microarchitecture level
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1