High speed low cost BiCMOS for RF applications using profile engineering

G. Minghui, Zhao Haijun, A. Bandyopadhyay, C. Jiang, Foo Pang Dow
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Abstract

This paper describes a low cost, CMOS foundry compatible BiCMOS process for 1.9 GHz RF applications. It keeps the simple feature of the triple-well single-poly approach while achieving much higher f/sub T/ by utilizing novel c-well profile engineering to reduce base and collector series resistance.
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高速低成本的射频应用BiCMOS采用轮廓工程
本文介绍了一种低成本、CMOS代工兼容的1.9 GHz射频应用BiCMOS工艺。它保留了三井单聚方法的简单特征,同时通过采用新颖的c井剖面工程来降低基极和集电极串联电阻,实现了更高的f/sub T/。
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