Pub Date : 1998-12-01DOI: 10.1109/ICSICT.1998.786434
Y. Shi, S. Gu, X. L. Yuan, Y.D. Zheng, K. Saito, H. Ishikuro, T. Hiramoto
MOS memory device with a silicon nanocrystal based floating gate on a very narrow channel has been fabricated. Large threshold voltage shifts of up to 1V are obtained by applying a small electric field to the tunnel oxide for write/erase operation. Furthermore, charge storage characteristics have been investigated in the MOS diodes, where various interface traps and defects were introduced by thermal annealing treatment.
{"title":"Silicon nano-crystals based MOS memory and effects of traps on charge storage characteristics","authors":"Y. Shi, S. Gu, X. L. Yuan, Y.D. Zheng, K. Saito, H. Ishikuro, T. Hiramoto","doi":"10.1109/ICSICT.1998.786434","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.786434","url":null,"abstract":"MOS memory device with a silicon nanocrystal based floating gate on a very narrow channel has been fabricated. Large threshold voltage shifts of up to 1V are obtained by applying a small electric field to the tunnel oxide for write/erase operation. Furthermore, charge storage characteristics have been investigated in the MOS diodes, where various interface traps and defects were introduced by thermal annealing treatment.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124471692","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785885
R. Akella, Chih-Hung Lin, Prasanna R. Chitturi
The current paper analyzes the relative merits of optical and SEM-based defect classification systems, the needs and costs associated with these systems, and the factors limiting the usability of these systems. In particular, we consider the impact of throughput rate and classification accuracy, on excursion detection and the resulting economic benefits. The paper includes a discussion of these models and a comparison is made to obtain the maximum benefits from existing optical and SEM review and classification methodologies. Scenarios for 0.25 micron fabs are used to indicate the procedures and policies that are the most effective from a fab economic perspective.
{"title":"Sampling methodology for SEM-based defect classification: risk, cost, and benefit analysis","authors":"R. Akella, Chih-Hung Lin, Prasanna R. Chitturi","doi":"10.1109/ICSICT.1998.785885","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785885","url":null,"abstract":"The current paper analyzes the relative merits of optical and SEM-based defect classification systems, the needs and costs associated with these systems, and the factors limiting the usability of these systems. In particular, we consider the impact of throughput rate and classification accuracy, on excursion detection and the resulting economic benefits. The paper includes a discussion of these models and a comparison is made to obtain the maximum benefits from existing optical and SEM review and classification methodologies. Scenarios for 0.25 micron fabs are used to indicate the procedures and policies that are the most effective from a fab economic perspective.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115157129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.786512
Guoying Wu, Zhixiong Xiao, Zhihong Li, Y. Hao
This paper mainly reviews the design rules and working principles of the main inertial sensors, which include the accelerometer and gyroscope, and the main micromachining technology used at the present time. The main research projects on the inertial sensors at the Institute of Microelectronics, Peking University, have been also illustrated.
{"title":"Design and fabrication for inertial micro sensors","authors":"Guoying Wu, Zhixiong Xiao, Zhihong Li, Y. Hao","doi":"10.1109/ICSICT.1998.786512","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.786512","url":null,"abstract":"This paper mainly reviews the design rules and working principles of the main inertial sensors, which include the accelerometer and gyroscope, and the main micromachining technology used at the present time. The main research projects on the inertial sensors at the Institute of Microelectronics, Peking University, have been also illustrated.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115440052","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785851
Zhao Yibing, Laihui, Li Zhizheng, Wu Dexin
An advanced structural deep sub-micron MOS device was presented and fabricated based on conventional photolithography equipment and novel side-wall technique. The effective channel length of 0.2 /spl mu/m could be reached. The transconductances of the optimized devices were 125 and 80 mS/mm for n-MOSFET and p-MOSFET respectively. The breakthrough voltages were 10 and 11 volt respectively for n-MOSFET and p-MOSFET.
{"title":"An advanced structural deep-submicron MOS device","authors":"Zhao Yibing, Laihui, Li Zhizheng, Wu Dexin","doi":"10.1109/ICSICT.1998.785851","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785851","url":null,"abstract":"An advanced structural deep sub-micron MOS device was presented and fabricated based on conventional photolithography equipment and novel side-wall technique. The effective channel length of 0.2 /spl mu/m could be reached. The transconductances of the optimized devices were 125 and 80 mS/mm for n-MOSFET and p-MOSFET respectively. The breakthrough voltages were 10 and 11 volt respectively for n-MOSFET and p-MOSFET.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127169552","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785907
Peng Xinguang
A fault detection method for mixed signal integrated circuits by the current integral is proposed. Monitoring the integral of the supply current is specially used for real time, batch testing for mixed signal integrated circuits because additional computation and comparing the obtained current waveforms with the free fault current do not required. Two bit parallel comparison CMOS AD converter is adopted as the circuit under test. The integral of the supply current is only monitored during one clock period when the input stimulus is applied, determining whether the circuit is free fault.
{"title":"Fault detection for mixed signal ICs by current integration","authors":"Peng Xinguang","doi":"10.1109/ICSICT.1998.785907","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785907","url":null,"abstract":"A fault detection method for mixed signal integrated circuits by the current integral is proposed. Monitoring the integral of the supply current is specially used for real time, batch testing for mixed signal integrated circuits because additional computation and comparing the obtained current waveforms with the free fault current do not required. Two bit parallel comparison CMOS AD converter is adopted as the circuit under test. The integral of the supply current is only monitored during one clock period when the input stimulus is applied, determining whether the circuit is free fault.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125833123","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785781
T. Kikkawa
This paper describes VLSI interconnect process integration with respect to ULSI scaling. Both resistivity and capacitance are key factors for materials used in the interconnect process integration. In order to reduce parasitic resistances of sub-quarter micron CMOS transistors, salicide technologies have been developed for gate and source/drain electrodes. Copper interconnects and low-k interlayer dielectrics, in conjunction with CMP planarization, have been developed to reduce RC delay for future scaled ULSIs.
{"title":"VLSI interconnect process integration","authors":"T. Kikkawa","doi":"10.1109/ICSICT.1998.785781","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785781","url":null,"abstract":"This paper describes VLSI interconnect process integration with respect to ULSI scaling. Both resistivity and capacitance are key factors for materials used in the interconnect process integration. In order to reduce parasitic resistances of sub-quarter micron CMOS transistors, salicide technologies have been developed for gate and source/drain electrodes. Copper interconnects and low-k interlayer dielectrics, in conjunction with CMP planarization, have been developed to reduce RC delay for future scaled ULSIs.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115217868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.786520
Chunyan Wang, F. Devos
We present an approach to design and implementation of silicon optical information sensor using VLSI technology which is not tuned for this purpose.
我们提出了一种使用VLSI技术设计和实现硅光学信息传感器的方法，该技术并未为此目的进行调整。
{"title":"Silicon optical information sensors","authors":"Chunyan Wang, F. Devos","doi":"10.1109/ICSICT.1998.786520","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.786520","url":null,"abstract":"We present an approach to design and implementation of silicon optical information sensor using VLSI technology which is not tuned for this purpose.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122916781","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785904
Lin Gu, Shi Bingxue
A novel switched-current mode sorter based on magnitude is proposed. In this sorter, switched-current circuit is used to track/hold input signals. Symmetric winner-take-all network is employed to find maximum current. Then, sorted currents based on magnitude are outputted in time-shared way. This sorter has a simple and flexible structure. It has wide current input/output range. Results of experiment show that the deviation of output current from the corresponding input current is small and the sorting resolution is high.
{"title":"A novel switched-current sorter based on magnitude","authors":"Lin Gu, Shi Bingxue","doi":"10.1109/ICSICT.1998.785904","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785904","url":null,"abstract":"A novel switched-current mode sorter based on magnitude is proposed. In this sorter, switched-current circuit is used to track/hold input signals. Symmetric winner-take-all network is employed to find maximum current. Then, sorted currents based on magnitude are outputted in time-shared way. This sorter has a simple and flexible structure. It has wide current input/output range. Results of experiment show that the deviation of output current from the corresponding input current is small and the sorting resolution is high.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121904741","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785866
H. Lange
Semiconducting transition metal silicides are of interest as potential candidates for new Si-based devices. The recent advances obtained on the understanding of the physical properties of this group of materials are summarized with special emphasis on /spl beta/-FeSi/sub 2/. Characteristic features of the electronic structure are outlined. Interband and infrared optical properties are in good agreement with theoretical predictions. Light emission could be observed from implanted /spl beta/-FeSi/sub 2/ layers only. Incorporation of corresponding dopants gives n- and p-type material. Carrier interaction with nonpolar optical and acoustic phonons as well as neutral impurities has to be taken into account. The problems and prospects of application of semiconducting silicides are discussed.
{"title":"Physical properties of semiconducting transition metal silicides and their prospects in Si-based device applications","authors":"H. Lange","doi":"10.1109/ICSICT.1998.785866","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785866","url":null,"abstract":"Semiconducting transition metal silicides are of interest as potential candidates for new Si-based devices. The recent advances obtained on the understanding of the physical properties of this group of materials are summarized with special emphasis on /spl beta/-FeSi/sub 2/. Characteristic features of the electronic structure are outlined. Interband and infrared optical properties are in good agreement with theoretical predictions. Light emission could be observed from implanted /spl beta/-FeSi/sub 2/ layers only. Incorporation of corresponding dopants gives n- and p-type material. Carrier interaction with nonpolar optical and acoustic phonons as well as neutral impurities has to be taken into account. The problems and prospects of application of semiconducting silicides are discussed.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129771493","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.786462
D. Singh
The application of first principles calculations based on density functional theory to novel thermoelectric materials is discussed. These calculations give an understanding of the electronic structure and transport coefficients that is often complementary to the view provided by experimental characterization efforts, and which is often useful in identifying promising materials and guiding their optimization. This is illustrated by examples in the skutterudites.
{"title":"Electronic structure and properties of novel thermoelectrics from first principles calculations","authors":"D. Singh","doi":"10.1109/ICSICT.1998.786462","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.786462","url":null,"abstract":"The application of first principles calculations based on density functional theory to novel thermoelectric materials is discussed. These calculations give an understanding of the electronic structure and transport coefficients that is often complementary to the view provided by experimental characterization efforts, and which is often useful in identifying promising materials and guiding their optimization. This is illustrated by examples in the skutterudites.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128305433","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：