R. Chau, S. Datta, M. Doczy, J. Kavalieros, M. Metz
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引用次数: 64
Abstract
We have successfully demonstrated very high-performance PMOS and NMOS transistors with high-K/metal-gate gate stacks with the right threshold voltages for both p- and n-channels on bulk Si. We believe that high-K/metal-gate is an option for the 45 nm high-performance logic technology node.
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