Ahmed S. H. Ahmed, A. Simsek, M. Urteaga, M. Rodwell
{"title":"8.6-13.6 mW Series-Connected Power Amplifiers Designed at 325 GHz Using 130 nm InP HBT Technology","authors":"Ahmed S. H. Ahmed, A. Simsek, M. Urteaga, M. Rodwell","doi":"10.1109/BCICTS.2018.8550924","DOIUrl":null,"url":null,"abstract":"We report two 325 GHz series-connected power amplifiers (PAs) using 130 nm InP HBT technology. The unit cell, using two series-connected transistors, produces 8.6 mW at 325 GHz and consumes 243 mW DC power. The PA has a 4.3 dB compressed gain and 2.2% power added efficiency (PAE). Two of these cells are then power-combined, and two further cells are used as driver stages, to form the second design, which produces 11.36 mW at 325 GHz with 9.4 dB compressed gain and 1.09% PAE. The peak small signal gain is 16.6 dB at 325 GHz, and the 3-dB bandwidth is 9 GHz. The total power consumed is 1.12 W and the dimensions including the pads are $0.98 \\mathbf{mm} \\times 0.98 \\mathbf{mm}$.","PeriodicalId":272808,"journal":{"name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BCICTS.2018.8550924","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
We report two 325 GHz series-connected power amplifiers (PAs) using 130 nm InP HBT technology. The unit cell, using two series-connected transistors, produces 8.6 mW at 325 GHz and consumes 243 mW DC power. The PA has a 4.3 dB compressed gain and 2.2% power added efficiency (PAE). Two of these cells are then power-combined, and two further cells are used as driver stages, to form the second design, which produces 11.36 mW at 325 GHz with 9.4 dB compressed gain and 1.09% PAE. The peak small signal gain is 16.6 dB at 325 GHz, and the 3-dB bandwidth is 9 GHz. The total power consumed is 1.12 W and the dimensions including the pads are $0.98 \mathbf{mm} \times 0.98 \mathbf{mm}$.
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