Guard-ring monitoring system for inspecting defects in TSV-based data buses

Abstract

Three-dimensional ICs are expected to bring about a new generation of integration by allowing for a smaller footprint, faster operation, and lower energy consumption. Manufacturing defects in through-silicon via (TSV) and disconnection defects among tiers are concerns in this new technology. To prevent yield loss from these defects, confirming known-good-die (KGD) and known-good-stacks (KGS) by test is a critical issue. In this paper, embedded circuitry is proposed to guarantee KGD and KGS by measuring noise on the guard-ring (GR) around TSVs. The proposed test circuit consists of simple circuitry and potentially can test multiple TSVs with just a single channel of test circuitry. A simple analytical model is created to discuss test capability of the circuitry with model of TSV array, such as would be encountered in Wide-I/O. After testing, GR is grounded for signal integrity of TSV data bus. Hence, it doesn't spoil wiring resources. Additionally, the test structure does not have any additional load to TSVs because of absence of wiring between the test structure and TSVs.