High level characterization and optimization of a GPSK modulator with genetic algorithm

S. Sahnoun, A. Fakhfakh, N. Masmoudi, H. Levi
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Abstract

Today, design requirements are extending more and more from electronic (analogue and digital) to multidiscipline ones. These current needs imply implementation of methodologies to make the CAD product reliable in order to improve time to market, study costs, reusability and reliability of the design process. This paper proposes a high level design approach applied for the characterization and the optimization of fractional-N synthesizer acting as a direct GPSK modulator and designed for the UMTS standard application. It uses the hardware description language VHDL-AMS and a genetic algorithm to optimize the modulator with a considerably reduced CPU time before passing to a transistor level characterization.
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基于遗传算法的GPSK调制器高阶特性与优化
今天,设计要求越来越多地从电子(模拟和数字)扩展到多学科。这些当前的需求意味着实施方法,使CAD产品可靠,以缩短上市时间,研究成本,设计过程的可重用性和可靠性。本文提出了一种高级设计方法,用于表征和优化作为直接GPSK调制器的分数n合成器,并为UMTS标准应用而设计。它使用硬件描述语言VHDL-AMS和遗传算法来优化调制器,在传递到晶体管级表征之前大大减少了CPU时间。
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