{"title":"Compact, low-voltage, low-power and high-bandwidth CMOS four-quadrant analog multiplier","authors":"A. Ebrahimi, H. M. Naimi, M. Gholami","doi":"10.1109/SM2ACD.2010.5672341","DOIUrl":null,"url":null,"abstract":"In this paper, a new compact, low power and low voltage structure for CMOS analog multiplier is proposed. All of them are implemented using a compact circuit. The circuit is designed and analyzed in 0.18µm CMOS process model. Simulation results for the circuit with a 1.2V single supply show that it consumes only 25µw quiescent power with 2GHz bandwidth and 1.5% THD.","PeriodicalId":442381,"journal":{"name":"2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)","volume":"105 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SM2ACD.2010.5672341","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
In this paper, a new compact, low power and low voltage structure for CMOS analog multiplier is proposed. All of them are implemented using a compact circuit. The circuit is designed and analyzed in 0.18µm CMOS process model. Simulation results for the circuit with a 1.2V single supply show that it consumes only 25µw quiescent power with 2GHz bandwidth and 1.5% THD.
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