Design of efficient analog physically unclonable functions using alternative test principles

Abstract

Alternative signature based testing of analog/RF circuits and systems has been established over the last two decades. Signature based testing is predicated on signature from device under test (DUT) to statistically predict specifications of an IC. Statistical correlation between specifications and signature are built from a set of initial ICs. Aliasing in signature space will produce aliasing in specification space and lead to incorrect specification prediction. Alternate test aims to create unique IC specific signature to avoid aliasing. Hardware security also entails a unique signature from the device to be authenticated. Theories and infrastructure build for alternative testing of analog/RF circuits can be leveraged to design analog security primitives (analog PUFs) for hardware security. In this paper we will focus on how the alternative signature test infrastructure can be extended to hardware security.