Dual Threshold Voltages And Substrate Bias: Keys To High Performance, Low Power, 0.1 /spl mu/m Logic Designs

Abstract

We show that dual threshold voltage devices and substrate bias are needed in high performance low power O.lpm logic designs. The circuit applications of the dual threshold devices differ from previous reports. In this work, the dual threshold devices consist of a low threshold device for static CMOS circuits and a higher threshold device for noise margin sensitive dynamic circuits. Dynamic substrate bias is needed to control standby leakage resulting from the static circuits.