Intra Fast Mode Decision Algorithm and Hardware Design for AVS2

Abstract

AVS2 is a kind of video coding standard proposed by China, it adopts 33 intra prediction modes to improve coding performance, while the computational complexity has increased dramatically. In order to reduce the complexity of AVS2 intra mode decision and make the AVS2 hardware encoder meet real-time requirements, this paper proposes the AVS2 intra fast mode decision algorithm and hardware design. The experimental results show that the intra mode decision algorithm and hardware design proposed in this paper can meet the throughput requirement of 1920x1080@60fps at a clock frequency of 300MHz. By using Xilinx FPGA XC7K325T 900 on the Vivado HLS platform for synthesis, only 10% of the LUT, 5% of FF, 5% of BRAM, and 6% of DSP in FPGA resources are consumed to meet the design requirements.