N. Seller, Andreia Cathelin, H. Lapuyade, J. Bégueret, E. Chataigner, Didier Belot
{"title":"A 10GHz Distributed Voltage Controlled Oscillator for WLAN Application in a VLSI 65nm CMOS Process","authors":"N. Seller, Andreia Cathelin, H. Lapuyade, J. Bégueret, E. Chataigner, Didier Belot","doi":"10.1109/RFIC.2007.380845","DOIUrl":null,"url":null,"abstract":"This work demonstrates the feasibility of a distributed voltage controlled oscillator (DVCO) designed for WLAN applications in a 65 nm CMOS process with standard VLSI backend. This DVCO achieves a tuning range of 1.1 GHz (from 10.6 GHz to 11.7 GHz) and a measured phase noise of -116 dBc/Hz at 1 MHz offset from the carrier. To achieve such performances, the DVCO consumes a DC current of 36 mA from a 2 V power supply.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2007.380845","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 18
Abstract
This work demonstrates the feasibility of a distributed voltage controlled oscillator (DVCO) designed for WLAN applications in a 65 nm CMOS process with standard VLSI backend. This DVCO achieves a tuning range of 1.1 GHz (from 10.6 GHz to 11.7 GHz) and a measured phase noise of -116 dBc/Hz at 1 MHz offset from the carrier. To achieve such performances, the DVCO consumes a DC current of 36 mA from a 2 V power supply.