{"title":"Hardware emulation of VLSI designs","authors":"T.A. Horvath, N. H. Kreitzer","doi":"10.1109/ASIC.1990.186182","DOIUrl":null,"url":null,"abstract":"A commercially available hardware emulation system and its expected capabilities are described, and results of an evaluation using an existing VLSI chip are reviewed. Based on this experience, the potential of the emulation system in ASIC design is assessed and areas of improvement are suggested. A forecast is also given of possible evolution of hardware emulation.<<ETX>>","PeriodicalId":126693,"journal":{"name":"Third Annual IEEE Proceedings on ASIC Seminar and Exhibit","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Third Annual IEEE Proceedings on ASIC Seminar and Exhibit","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1990.186182","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A commercially available hardware emulation system and its expected capabilities are described, and results of an evaluation using an existing VLSI chip are reviewed. Based on this experience, the potential of the emulation system in ASIC design is assessed and areas of improvement are suggested. A forecast is also given of possible evolution of hardware emulation.<>
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