Physical insights on design and modeling of nanoscale FinFETs

Abstract

An array of measured device data, a numerical device simulator, and a process/physics-based compact model are used to gain new and important physical insights on nanoscale FinFETs with undoped thin-fin bodies. The insights, which include unavoidable/needed gate underlap, bias-dependent effective channel length, and non-ohmic fin-extension voltage drops, reveal the significance of gate positioning on, and source/drain doping profile in, the thin fin, and imply novel compact modeling that will be needed for optimal design of nonclassical CMOS circuits.