An All-Digital 90-Degree Phase-Shift DLL with Loop-Embedded DCC for 1.6Gbps DDR Interface

Jun-Hyun Bae, Jin-Ho Seo, H. Yeo, Jae-Whui Kim, J. Sim, Hong-June Park
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引用次数: 21

Abstract

An all-digital 90deg phase-shift DLL is proposed for 1.6 Gbps DDR interface by using a loop-embedded DCC and a binary phase detector with the lock range extended to 0~4pi radians. The DCC has a small delay and the fixed rising-edge property for loop-embedding. The chip fabricated with a 0.13 um CMOS process gives the DLL data rate of 667 Mbps~1.6 Gbps and the output duty cycle of 47.8%~49% for the input duty cycle of 23%~76%, at 1.6 Gbps and 1.2 V.
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1.6Gbps DDR接口全数字90度相移DLL及环内DCC
采用环嵌式DCC和二进制鉴相器,提出了一种适用于1.6 Gbps DDR接口的全数字90度相移DLL,锁相范围扩展到0~4pi弧度。DCC具有较小的时延和固定的上升沿特性,适合于环嵌入。该芯片采用0.13 um CMOS工艺制作,在1.6 Gbps和1.2 V电压下,DLL数据速率为667mbps ~1.6 Gbps,输出占空比为47.8%~49%,输入占空比为23%~76%。
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