Logic Design of a 16-bit Bit-Slice Shifter for 64-bit RSFQ Microprocessors

Abstract

Logic design of a 16-bit bit-slice shifter for 64-bit superconducting rapid single-flux-quantum (RSFQ) microprocessors is proposed. The shifter supports three types of shift operations including logic shift, arithmetic shift and rotating shift. Each of 64-bit shift input operands is divided into four slices of 16-bit each. In order to simulate the digital function and timing of the proposed 16-bit bit-slice shifter, we design a logic-level simulation model based on the Open Dataset of CONNECT Cell Library for AIST ADP2. As the results of simulation, the information of RSFQ circuits, such as the number of Josephson junctions, area and latency of the 16-bit bit slice shifter can be obtained. The simulation results show that the proposed 16-bit bit-slice shifter can work correctly.