K. Murata, T. Saida, I. Ogawa, R. Kasahara, Y. Muramoto, H. Fukuyama, K. Sano, H. Nosaka, H. Kawakami
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引用次数: 1
Abstract
This paper describes device and integration technologies for 100-Gbit/s polarization division multiplexed quadrature phase shift keying integrated coherent receiver front-end. The silica-based planar lightwave circuits for the optical passive circuits, InP-based photodiode for the opto-electrical conversion, and InP HBT for the transimpedance amplification are used to achieve high-performance. A module-level hybrid integration technology based on a chip-scale packaged O/E converter is applied as the integration technology. The fabricated receiver front-end has a wide dynamic range of around 20dB with a constant local power of 13.5 dBm and an excellent common-mode rejection ratio of better than -25dB up to 25GHz.
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