Y. Song, J. Lee, Sung-hee Han, H. Shin, K. H. Lee, K. Suh, D. Jeong, G. Koh, Sechung Oh, Joon-Min Park, Soojeoung Park, B. Bae, O. I. Kwon, K. Hwang, Bum-seok Seo, You Kyoung Lee, S. Hwang, Dongsoo Lee, Y. Ji, Kyu-Charn Park, G. Jeong, Hyunju Hong, K. Lee, H. K. Kang, E. Jung
{"title":"Demonstration of Highly Manufacturable STT-MRAM Embedded in 28nm Logic","authors":"Y. Song, J. Lee, Sung-hee Han, H. Shin, K. H. Lee, K. Suh, D. Jeong, G. Koh, Sechung Oh, Joon-Min Park, Soojeoung Park, B. Bae, O. I. Kwon, K. Hwang, Bum-seok Seo, You Kyoung Lee, S. Hwang, Dongsoo Lee, Y. Ji, Kyu-Charn Park, G. Jeong, Hyunju Hong, K. Lee, H. K. Kang, E. Jung","doi":"10.1109/IEDM.2018.8614635","DOIUrl":null,"url":null,"abstract":"We successfully demonstrated the manufacturability of 8Mb STT-MRAM embedded in 28nm FDSOI logic platform by achieving stable functionality and robust package level reliability. Read margin were greatly improved by increasing TMR value and also reducing distribution of cell resistance using advanced MTJ stack and patterning technology. Write margin was also increased by improving the efficiency using novel integration process. Its product reliability was confirmed in package level with passing HTOL 1000 hours tests, 106 endurance test, and retention test. For a wider application, we also demonstrated the feasibility of high density 128Mb STT-MRAM. Based on these results, we clearly verified the product manufacturability of embedded STT-MRAM.","PeriodicalId":152963,"journal":{"name":"2018 IEEE International Electron Devices Meeting (IEDM)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"64","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE International Electron Devices Meeting (IEDM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2018.8614635","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 64
Abstract
We successfully demonstrated the manufacturability of 8Mb STT-MRAM embedded in 28nm FDSOI logic platform by achieving stable functionality and robust package level reliability. Read margin were greatly improved by increasing TMR value and also reducing distribution of cell resistance using advanced MTJ stack and patterning technology. Write margin was also increased by improving the efficiency using novel integration process. Its product reliability was confirmed in package level with passing HTOL 1000 hours tests, 106 endurance test, and retention test. For a wider application, we also demonstrated the feasibility of high density 128Mb STT-MRAM. Based on these results, we clearly verified the product manufacturability of embedded STT-MRAM.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
