{"title":"An investigation of on-chip spiral inductors on a 0.6 /spl mu/m BiCMOS technology for RF applications","authors":"J. A. Power, S. C. Kelly, E. Griffith, M. O’Neill","doi":"10.1109/ICMTS.1999.766209","DOIUrl":null,"url":null,"abstract":"Inductors are very important passive elements in many RF circuit applications. Integrated on-chip metal inductors, formed in conventional CMOS or BiCMOS technologies, suffer from performance limitations due to substrate injection through the oxide, metal resistive losses, and substrate losses due to low-resistivity substrates. These problems mean that the highest attainable inductor quality factor (Q) is significantly lower than that which can be attained from off-chip inductors. This paper details an analysis of on-chip metal inductors fabricated on a 0.6 /spl mu/m BiCMOS technology. Issues relating to test structure layout, measurement techniques, inductor composition, and inductor characterization and modeling are addressed. In addition, an analysis of the impact of inductor shape and metal thickness on inductor performance is examined.","PeriodicalId":273071,"journal":{"name":"ICMTS 1999. Proceedings of 1999 International Conference on Microelectronic Test Structures (Cat. No.99CH36307)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICMTS 1999. Proceedings of 1999 International Conference on Microelectronic Test Structures (Cat. No.99CH36307)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMTS.1999.766209","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19
Abstract
Inductors are very important passive elements in many RF circuit applications. Integrated on-chip metal inductors, formed in conventional CMOS or BiCMOS technologies, suffer from performance limitations due to substrate injection through the oxide, metal resistive losses, and substrate losses due to low-resistivity substrates. These problems mean that the highest attainable inductor quality factor (Q) is significantly lower than that which can be attained from off-chip inductors. This paper details an analysis of on-chip metal inductors fabricated on a 0.6 /spl mu/m BiCMOS technology. Issues relating to test structure layout, measurement techniques, inductor composition, and inductor characterization and modeling are addressed. In addition, an analysis of the impact of inductor shape and metal thickness on inductor performance is examined.
电感器是射频电路中非常重要的无源元件。在传统CMOS或BiCMOS技术中形成的集成片上金属电感,由于衬底注入氧化物、金属电阻损耗以及低电阻衬底造成的衬底损耗而受到性能限制。这些问题意味着可获得的最高电感质量因子(Q)明显低于片外电感所能获得的质量因子。本文详细分析了以0.6 /spl μ m BiCMOS工艺制作的片上金属电感。与测试结构布局,测量技术,电感组成,电感表征和建模有关的问题被解决。此外,还分析了电感器形状和金属厚度对电感器性能的影响。