A compact parasitic-insensitive dual-frequency ΔΣ modulated CMOS capacitive architecture

Abstract

We present a simple, high-sensitivity, array-based capacitive sensing architecture for biological applications. Conventional charge based capacitance measurement (CBCM) techniques sense grounded coupling capacitances along with unwanted parasitics. These parasitics can be orders of magnitude higher than the coupling capacitances, thus severely reducing the usable sensor dynamic range. The presented architecture utilizes an accurate charge integration technique [1] to attenuate the effect of unwanted parasitics. Unlike CBCM, the architecture can also perform capacitance-voltage profiling of nonlinear biological capacitances at very low voltages. The architecture includes a first order ΔΣ modulator with dual input frequency to increase the sensor dynamic range. We verify the circuit implemented in a 0.35μm CMOS technology by simulating for different values of parasitic capacitances, process corners and varying test voltages across capacitors.