Synchronization strategies in cascaded H-Bridge multi level inverters for carrier based sinusoidal PWM techniques

Abstract

This paper proposes synchronization strategies for cascaded H-Bridge multi level inverter (CHBMLI) topologies with carrier based sinusoidal pulse width modulation (PWM) techniques. It is presented how synchronous carriers are generated in desired phase and frequency from the instantaneous voltage references to maintain 3-Φ, half wave and quarter wave symmetries among inverter pole voltage outputs for carrier based sinusoidal PWM of CHBMLI. To achieve dynamic synchronization, the triangular carriers are generated from the instantaneous voltage references in a phase locked manner. The scheme is experimentally tested with phase shifted PWM technique for both open loop Vbyf and closed loop vector control of squirrel cage induction motor drive supplied from a 3-Φ 5 level CHBMLI and the results are presented.