ASK Modulator Spur reduction using Sigma Delta Modulator and Oscillator

Baek Sop Kim, Kangyoon Lee
{"title":"ASK Modulator Spur reduction using Sigma Delta Modulator and Oscillator","authors":"Baek Sop Kim, Kangyoon Lee","doi":"10.1109/ISOCC50952.2020.9332975","DOIUrl":null,"url":null,"abstract":"This paper proposes a technique that uses the Sigma Delta modulator and oscillator to reduce the modulation reference clock in dedicated short range communication (DSRC) applications using Amplitude shift Keying (ASK) modulation. The digital modulator's reference clock is supplied from an oscillator that is frequency-tunable with current and capacitors. Sigma-delta modulator modulates the current of the oscillator to reduce the spur by clock-dithering the components of the digital modulator reference clock occurring at the TX output. The proposed structure is implemented using CMOS 130nm process and uses 1.2V supply power.","PeriodicalId":270577,"journal":{"name":"2020 International SoC Design Conference (ISOCC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2020-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC50952.2020.9332975","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

This paper proposes a technique that uses the Sigma Delta modulator and oscillator to reduce the modulation reference clock in dedicated short range communication (DSRC) applications using Amplitude shift Keying (ASK) modulation. The digital modulator's reference clock is supplied from an oscillator that is frequency-tunable with current and capacitors. Sigma-delta modulator modulates the current of the oscillator to reduce the spur by clock-dithering the components of the digital modulator reference clock occurring at the TX output. The proposed structure is implemented using CMOS 130nm process and uses 1.2V supply power.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
ASK调制器使用σ δ调制器和振荡器减少杂散
本文提出了一种利用σ δ调制器和振荡器来降低专用短距离通信(DSRC)应用中使用移幅键控(ASK)调制的调制参考时钟的技术。数字调制器的参考时钟由具有电流和电容的频率可调振荡器提供。Sigma-delta调制器通过对数字调制器参考时钟在TX输出处发生的组件进行时钟抖动来调制振荡器的电流以减少杂散。该结构采用CMOS 130nm工艺,采用1.2V电源供电。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A Quadcopters Flight Simulation Considering the Influence of Wind Design of a CMOS Current-mode Squaring Circuit for Training Analog Neural Networks Instant and Accurate Instance Segmentation Equipped with Path Aggregation and Attention Gate 13.56 MHz High-Efficiency Power Transmitter and Receiver for Wirelessly Powered Biomedical Implants Investigation on Synaptic Characteristics of Interfacial Phase Change Memory for Artificial Synapse Application
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1