High-performance multiple-valued radix-2 signed-digit multiplier and its application

Abstract

1. I " 0 N In various VLSI systems for real-time applications, high-speed compact multipliers are required a s mcrocells. Signed-digit(SD) number representations are useful for such high-speed arithmetic circuits[l]. Since the SD number representation uses more than 3 values in each digit, we can expect the effective use of multiplevalued logic circuits for the compact harduare(VLS1) implementations. In particular, multiple-valued bidirectional current-mode circmits is essentially suitable. because frequently used linear summation including polarity can be performed by wiring[Z]. From the view point of compactness, the radix-4 SD number representation is attractive[31. For VLSI implementation, however, the radix-2 SD number( also called redundant binary number) representation is useful from the view points of stable and faster operation of multiple-valued current-mode circuits, if present VLSI process technology is directly used. In this paper, we describes high-speed compact radix-2 SO multiplier using multiple-valued current-mode logic circuits. A new tree structure of the SD multiplier using &-input addition of partial products are proposed. The current-mode wired summation can be fully used far the structure, so that the number of full adders and interconnections can be drastically reduced. The implemented results of a prototype adder chip as the basic module are shown. Finally, an application to highly parallel vector inner product processing is discussed. 2. BIDIREcTlowAL -DE SD llRIllHZlTC CIRCUITS The radix-2 SD number system utilized here is a redundant representation using a symmetrical digit set(-1. 0.1). Addition of two numbers, X and Y are performed by the following successive steps in each digit. STEP 1: STEP 2: 2c; + Yi = z> zi = xi + yi