Fabrication of the sub-100 nm thin body SOI Schottky barrier tunneling transistors with sidewall etchback technology

Abstract

The Schottky barrier MOSFETs with channel length of 70 nm have been fabricated with sidewall etchback technology. The conventional lithography is applied for the definition of the sub-100 nm channel region. In the process, the advanced lithography technology has not been involved. The SOI structure has been used to take place of the bulk silicon substrate, and the silicon on the source and drain has been transformed to silicide. The thermal emission leakage current is reduced due to the decrease of the area of the source/drain Schottky contact.