{"title":"Advanced CMOS/SOS LSI rad hard 1750 A/B processor","authors":"L. Koczela","doi":"10.1109/SOSSOI.1990.145769","DOIUrl":null,"url":null,"abstract":"Development of an advanced processor, the RI 1750AB, that utilizes the benefits of the 3 mu m CMOS/SOS technology and is intended for strategic-level radiation-hard guidance computers is reported. The RI 1750AB contains many special features enhancing its use in a real-time-control/radiation-tolerant system. These include trap and patch registers which allow changes in ROM memory in the field without having to replace the ROM chips. For most applications the CPU will operate through, in the true sense, without radiation upset. However, where extremely high transient levels may be encountered, the CPU supports both software and hardware circumvention. The CPU has an optional snapshot mode of operation which allows hardware-controlled, instead of software-controlled, program restart after radiation upset. To support circumvention, the CPU has several control lines that enable it to distinguish between a power turn-on and a radiation restart.<<ETX>>","PeriodicalId":344373,"journal":{"name":"1990 IEEE SOS/SOI Technology Conference. Proceedings","volume":"111 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1990 IEEE SOS/SOI Technology Conference. Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOSSOI.1990.145769","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Development of an advanced processor, the RI 1750AB, that utilizes the benefits of the 3 mu m CMOS/SOS technology and is intended for strategic-level radiation-hard guidance computers is reported. The RI 1750AB contains many special features enhancing its use in a real-time-control/radiation-tolerant system. These include trap and patch registers which allow changes in ROM memory in the field without having to replace the ROM chips. For most applications the CPU will operate through, in the true sense, without radiation upset. However, where extremely high transient levels may be encountered, the CPU supports both software and hardware circumvention. The CPU has an optional snapshot mode of operation which allows hardware-controlled, instead of software-controlled, program restart after radiation upset. To support circumvention, the CPU has several control lines that enable it to distinguish between a power turn-on and a radiation restart.<>