N. Subramani, M. Bouslama, R. Sommet, J. Nallatamby
{"title":"Time Domain Drain Lag Measurement and TCAD-based Device Simulations of AlGaN/GaN HEMT: Investigation of Physical Mechanism","authors":"N. Subramani, M. Bouslama, R. Sommet, J. Nallatamby","doi":"10.23919/EuMIC.2019.8909549","DOIUrl":null,"url":null,"abstract":"In this work, traps induced drain-lag dispersion mechanism of GaN/AlGaN/GaN HEMT grown on SiC substrate is investigated through time domain drain lag measurement and TCAD-based physical device simulations. The transient variation of the drain current owing to applied drain turn-on voltage pulses have been examined. Furthermore, TCAD physical simulations have been performed by introducing traps in various regions of the device, in order to identify the physical location of traps causing drain-lag mechanism. The simulation results validate that acceptor-like traps existing in the GaN buffer are responsible for the drain-lag effect observed in measurement.","PeriodicalId":228725,"journal":{"name":"2019 14th European Microwave Integrated Circuits Conference (EuMIC)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 14th European Microwave Integrated Circuits Conference (EuMIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/EuMIC.2019.8909549","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
In this work, traps induced drain-lag dispersion mechanism of GaN/AlGaN/GaN HEMT grown on SiC substrate is investigated through time domain drain lag measurement and TCAD-based physical device simulations. The transient variation of the drain current owing to applied drain turn-on voltage pulses have been examined. Furthermore, TCAD physical simulations have been performed by introducing traps in various regions of the device, in order to identify the physical location of traps causing drain-lag mechanism. The simulation results validate that acceptor-like traps existing in the GaN buffer are responsible for the drain-lag effect observed in measurement.