{"title":"Middleware switch ASIC implementation","authors":"V. Petrovic, G. Schoof, S. Montenegro","doi":"10.1109/ICECS.2011.6122369","DOIUrl":null,"url":null,"abstract":"The middleware (MW) switch processor as a part of the new spacecraft area network (SCAN) system for internal satellite communication provides the data transfer between different components, sensors and devices. The new data transfer approach provides more reliable, cheaper and faster solution instead of current board computer based systems. The processor is currently in fabrication process in the 250 nm IHP technology. In this paper we are representing description of MW switch architecture, comparison between different architecture approaches and properties of the implemented MW Switch processor.","PeriodicalId":251525,"journal":{"name":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems","volume":"2013 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2011.6122369","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The middleware (MW) switch processor as a part of the new spacecraft area network (SCAN) system for internal satellite communication provides the data transfer between different components, sensors and devices. The new data transfer approach provides more reliable, cheaper and faster solution instead of current board computer based systems. The processor is currently in fabrication process in the 250 nm IHP technology. In this paper we are representing description of MW switch architecture, comparison between different architecture approaches and properties of the implemented MW Switch processor.