M. Gross, M. Stoisiek, T. Uhlig, C. Ellmers, F. Furnhammer
{"title":"Lateral HV-MOS transistors (50V) for integration in a 0.18μm CMOS-process","authors":"M. Gross, M. Stoisiek, T. Uhlig, C. Ellmers, F. Furnhammer","doi":"10.1109/ESSDERC.2007.4430908","DOIUrl":null,"url":null,"abstract":"<sub>DS(on)</sub> *A = 36.2 mQmm<sup>2</sup> at a breakdown voltage of 60 V. The integration of the devices in the CMOS base process uses five additional photo masks.","PeriodicalId":103959,"journal":{"name":"ESSDERC 2007 - 37th European Solid State Device Research Conference","volume":"136 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSDERC 2007 - 37th European Solid State Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDERC.2007.4430908","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
DS(on) *A = 36.2 mQmm2 at a breakdown voltage of 60 V. The integration of the devices in the CMOS base process uses five additional photo masks.