1-Gb/s mixed-mode BPSK demodulator using a half-rate linear phase detector for 60-GHz wireless PAN applications

Kwang-Chun Choi, Duho Kim, M. Ko, W. Choi
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引用次数: 5

Abstract

A mixed-mode high-speed binary phase-shift keying (BPSK) demodulator for IEEE802.15.3c mm-wave wireless personal area network (WPAN) application is realized with 0.18 mum CMOS process. The demodulator core consumes 23.4 mW from 1.8 V power supply while the chip area is 165 times 110 PMZ. The power-consumption is less than that of the conventional BPSK demodulators and the chip-size is smaller. The proposed circuit is verified by 1-meter 60-GHz wireless link tests with 1-Gb/s data.
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采用半速率线性鉴相器的1 gb /s混合模式BPSK解调器,适用于60 ghz无线PAN应用
采用0.18 μ m CMOS工艺,实现了IEEE802.15.3c毫米波无线个人区域网络(WPAN)应用的混合模式高速二相移键控(BPSK)解调器。解调核心在1.8 V电源下消耗23.4 mW,而芯片面积为165 × 110 PMZ。与传统的BPSK解调器相比,其功耗更低,芯片尺寸更小。该电路通过1米60 ghz无线链路测试,以1 gb /s数据进行验证。
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