High Performance 60 GHz Bidirectional Phased Array Front End in SiGe BiCMOS

R. B. Yishay, O. Katz, B. Sheinman, D. Elad
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引用次数: 2

Abstract

This paper discusses the design and implementation of a 57-66 GHz bidirectional phased-array frontend in SiGe BiCMOS for time-duplexed transceivers. The TX path includes PA, power detector, variable attenuator and phase inverter. A fine-tuned 0-180° passive phase shifter is shared with the RX path which integrates also LNA, variable attenuators and phase inverter (PI). In RX mode, the front-end achieves 22 dB, gain bandwidth of 14 GHz and 6.4 dB minimum NF in the high-gain mode. In TX mode, the front-end achieves 12 dBm saturated output power, 9.7 dBm output-referred 1dB compression point, 24 dB gain, and 8 GHz bandwidth. The phase shifters achieve full 360° phase span with 6-bit phase resolution, 2.3° rms phase error and 0.2 dB rms gain error at 60 GHz. The IC occupies area of 3.3 mm2 (including pads) and consumes 102 mW / 256 mW in RX/TX (at P1dB), respectively.
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高性能60ghz双向相控阵前端SiGe BiCMOS
本文讨论了一种用于双工收发器的57 ~ 66ghz SiGe BiCMOS双向相控阵前端的设计与实现。TX路径包括PA、功率检测器、可变衰减器和逆变器。一个微调0-180°无源移相器与RX路径共享,该路径还集成了LNA,可变衰减器和逆变器(PI)。在RX模式下,前端实现22db,增益带宽14ghz,高增益模式下实现6.4 dB最小NF。在TX模式下,前端实现12dbm饱和输出功率,9.7 dBm输出参考1dB压缩点,24db增益,8ghz带宽。该移相器在60 GHz时实现360°相跨,6位相位分辨率,2.3°相位误差和0.2 dB增益误差。该IC占地3.3 mm2(含焊盘),RX/TX (P1dB)功耗分别为102 mW / 256 mW。
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