CMOS variable-gain amplifier for low-frequency applications

Michal Sovcík, Michal Matuska, D. Arbet, V. Stopjaková
{"title":"CMOS variable-gain amplifier for low-frequency applications","authors":"Michal Sovcík, Michal Matuska, D. Arbet, V. Stopjaková","doi":"10.1109/DDECS.2016.7482477","DOIUrl":null,"url":null,"abstract":"Design of variable-gain amplifier (VGA), based on fully differential operational amplifier is presented. The proposed VGA topology was verified through simulations and analysis of main circuit parameters. The VGA is designed in 0.35 μm CMOS technology using Cadence environment and BSIM3 family of models. Designed circuit works with the power supply of 3.3 V. The simulation results show that gain bandwidth (GBW) of about 12 MHz (for capacitive load of 1 pF) and the total harmonic distortion of less than 1% for input amplitude 100 mV were achieved. Implemented feedback circuit is stable according to phase margin of 68.15°.","PeriodicalId":404733,"journal":{"name":"2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DDECS.2016.7482477","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

Design of variable-gain amplifier (VGA), based on fully differential operational amplifier is presented. The proposed VGA topology was verified through simulations and analysis of main circuit parameters. The VGA is designed in 0.35 μm CMOS technology using Cadence environment and BSIM3 family of models. Designed circuit works with the power supply of 3.3 V. The simulation results show that gain bandwidth (GBW) of about 12 MHz (for capacitive load of 1 pF) and the total harmonic distortion of less than 1% for input amplitude 100 mV were achieved. Implemented feedback circuit is stable according to phase margin of 68.15°.
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用于低频应用的CMOS可变增益放大器
介绍了一种基于全差分运算放大器的可变增益放大器(VGA)的设计。通过仿真和主电路参数分析,验证了所提出的VGA拓扑结构。VGA采用0.35 μm CMOS技术,采用Cadence环境和BSIM3系列型号。所设计的电路在3.3 V的电源下工作。仿真结果表明,当输入幅值为100 mV时,增益带宽(GBW)约为12 MHz,总谐波失真小于1%。根据68.15°的相位裕度,所实现的反馈电路是稳定的。
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