K. Lee, K. Oi, S. Lim, Yvonne Yeo, K. Sweatman, T. Ono, K. Murayama, S. Martell, H. Shimamoto, M. Tsuriya
{"title":"Voids in First-Level Interconnects and Their Impact on Solder Joint Reliability","authors":"K. Lee, K. Oi, S. Lim, Yvonne Yeo, K. Sweatman, T. Ono, K. Murayama, S. Martell, H. Shimamoto, M. Tsuriya","doi":"10.23919/ICEP55381.2022.9795574","DOIUrl":null,"url":null,"abstract":"The presence of voids in first-level interconnects (FLI) is an unknown reliability concern. This paper presents the study of void formation in the interconnects, the inspection capability of void detection and the reliability impact of the voids in electromigration, thermal cycle and thermal shock tests. The first phase of this work has made it possible to define process recipes that can consistently build test packages with and without solder voids. X-ray inspection has been used to determine the level of voiding in the test packages. The second phase of this work has focused on subjecting the test packages to the said reliability tests. A comparison has been made between test packages with solder voids and test packages without solder voids. A conclusion that can be derived from the test data is that test packages with solder voids performed worse in solder joint reliability compared to test packages without solder voids.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"344 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 International Conference on Electronics Packaging (ICEP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/ICEP55381.2022.9795574","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The presence of voids in first-level interconnects (FLI) is an unknown reliability concern. This paper presents the study of void formation in the interconnects, the inspection capability of void detection and the reliability impact of the voids in electromigration, thermal cycle and thermal shock tests. The first phase of this work has made it possible to define process recipes that can consistently build test packages with and without solder voids. X-ray inspection has been used to determine the level of voiding in the test packages. The second phase of this work has focused on subjecting the test packages to the said reliability tests. A comparison has been made between test packages with solder voids and test packages without solder voids. A conclusion that can be derived from the test data is that test packages with solder voids performed worse in solder joint reliability compared to test packages without solder voids.